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Polyphase Interpolation Filter
CoreFIR
input data
input data valid
DATAI
DATAI_VALID
FIRO
FIRO_VALID
output data
output data valid
COEFI
COEFI_VALID
select coefficient set
COEF_SEL
Optional
refresh coefficient set
Optional confirmation
a recipient is ready
clock
synch reset
asynch reset
COEF_REF
RCLK
CLK
RSTN
NGRST
COEF_REF_DONE
READY
Optional flag of set
loading completion
Optional ready for a new
input data sample
CoreFIR
input data
input data valid
DATAI
DATAI_VALID
FIRO
FIRO_VALID
output data
output data valid
COEFI
COEFI_VALID
select coefficient set
COEF_SEL
Optional
refresh coefficient set
Enable newly loaded
coefficient set
Optional confirmation
a recipient is ready
clock
synch reset
asynch reset
COEF_REF
COEF_ON
RCLK
CLK
RSTN
NGRST
COEF_REF_DONE
READY
Optional flag of set
loading completion
Optional ready for a new
input data sample
Figure 37 · Multiple Coefficient Set Configuration
Data Path Bit Width
The core supports signed and unsigned data and coefficients. The core can be configured accordingly. The
output data is unsigned, if both input data and coefficients are unsigned. Otherwise the output data is
signed. Input and output data, as well as the coefficients, are integers in two’s complement format.
The core supports signed data and coefficient of 2 to 18 bits. For the unsigned data and coefficients, the bit
width is limited to 17 bits.
Internal filter processing takes place at full precision to reduce truncation or rounding noise and avoid risk of
overflow. The filter output data are presented in full precision as well. If the data and coefficient bit widths
are DATA_WIDTH and COEF_WIDTH, and the number of filter taps = TAPS, then the full precision output
bit width is given by EQ 9.
Output Bit Width = DATA_WIDTH + COEF_WIDTH + ceiling(log 2 (TAPS/L))
42
CoreFIR v8.5 Handbook
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